Analysis on Gate-Oxide Thickness Dependence of Hot-Carrier- Induced Degradation in Submicrometer LDD nMOSFET's

• Main Authors: Jiunn-Pey Wu, 吳俊沛
• Other Authors: Steve Shao-Shiun Chung
• Format: Others
• Language: en_US
• Published: 1995
• Online Access: http://ndltd.ncl.edu.tw/handle/44807502258254042698

碩士 === 國立交通大學 === 電子研究所 === 83 === In this thesis, gate-oxide thickness dependecnce of hot- carrier-induced degradation is investigated for LDD nMOSFET' s. It is shown that a thinner gate oxide LDD nMOSFET's causes larger drain current degradation under the same bias stress condition. However, it has been reported that a thinner gate oxide conventional nMOSFET shows smaller degradation. Since the dominant degradation mechanism for the LDD device differ from the conventional device, due to the spacer-induced degradation, an improved drain linear-current degradation model is developed in order to investigate the degradation mechanism in LDD MOSFET. A new degradation mechanism is introduced to account for the increasing of resistance in the n- region due to the generation of interface states. Further, since the effective channel length and the source-drain series resistance of an LDD device are gate-voltage dependent, the paired Vg method is used to extract the effective channel length and the series resistance. It can be found that this generalized drain current degradation model gives a good agreement to the measured data for different gate oxide thickness. Based on this model, the gate-oxide thickness dependence of degradation can be well analyzed.