Analysis and Simulation of Punchthrough for Deep Submicron MOSFETs Process Technology
碩士 === 國立交通大學 === 電子研究所 === 83 === In deep sub-micron MOSFET VLSI devices, the punchthrough is one of the major limited mechanisms. It occurs when the electric field due to drain bias sufficiently reduces the potential barrier at the source...
Main Authors: | , |
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Other Authors: | |
Format: | Others |
Language: | en_US |
Published: |
1995
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Online Access: | http://ndltd.ncl.edu.tw/handle/56237405835334984300 |