VLSI Design for Second Order Digital Multiplexer
碩士 === 國立中正大學 === 電機工程研究所 === 83 === In this thesis, the ME12 multiplexer/demultiplexer design is described. First, the North American and European Digital Signal Hierarchy are introduced. The frame formats of the North American Digita...
| Main Authors: | , |
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| Format: | Others |
| Language: | en_US |
| Online Access: | http://ndltd.ncl.edu.tw/handle/33472032770578107500 |