| Summary: | 碩士 === 國立交通大學 === 工業工程研究所 === 82 ===
As the complexity of integrated circuits rise, the size of chip increases and the clustering of defects emerges, existing yield models, such as the Poisson model, gradually result in deviation and thus become impractical. Even the negative binominal model which are most popular in the IC industry nowadays since its defect-clustering parameter is related to the chip size and probably may vary with the lot are questioned by many scholars.
The objective of this research is to aim at the drawbacks of present yield models, take defect clustering in account, and then, through statistical analysis, develop a yield model with better yield prediction capability. In this resrearch, we first combine quadrat analysis, hierarchical clustering method, and correlation coefficient method as a defect-clustering analysis procedure to locate defect clusters on wafer maps, identify members of clusters and the relative strength of clustering. Then adopting the concept of wafer partition, we develop a procedure to modify Poisson model with a view to effacing the impact of defect clustering on yield prediction of the poisson yield model.
Through experimental analysis, the clustering analysis procedure proposed by this research are verified to be good at detecting defect clusters, moreover the yield predicton ofmodified Poisson model is more accurate than existing, yield models. Besides, we conclude that yield analysis is applicable in production line, and the strong defect-clustering is likely resulted from mechanical malfunction or human errors.
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