An implementation and layout of a 32-bit arithmetic co-processor (with improvement of accuracy for logarithmic conversion)

碩士 === 逢甲大學 === 資訊工程研究所 === 82 ===

Bibliographic Details
Main Authors:	Liu, Huang Lin, 劉皇麟
Other Authors:	Luo, Hao Rong
Format:	Others
Language:	zh-TW
Published:	1994
Online Access:	http://ndltd.ncl.edu.tw/handle/02453557392387793738

id	ndltd-TW-082FCU02392002
record_format	oai_dc
spelling	ndltd-TW-082FCU023920022016-02-10T04:08:57Z http://ndltd.ncl.edu.tw/handle/02453557392387793738 An implementation and layout of a 32-bit arithmetic co-processor (with improvement of accuracy for logarithmic conversion) 32位元算術協同處理器之實現與佈線 Liu, Huang Lin 劉皇麟碩士逢甲大學資訊工程研究所 82 Luo, Hao Rong 羅浩榮 1994 學位論文 ; thesis 0 zh-TW
collection	NDLTD
language	zh-TW
format	Others
sources	NDLTD
description	碩士 === 逢甲大學 === 資訊工程研究所 === 82 ===
author2	Luo, Hao Rong
author_facet	Luo, Hao Rong Liu, Huang Lin 劉皇麟
author	Liu, Huang Lin 劉皇麟
spellingShingle	Liu, Huang Lin 劉皇麟 An implementation and layout of a 32-bit arithmetic co-processor (with improvement of accuracy for logarithmic conversion)
author_sort	Liu, Huang Lin
title	An implementation and layout of a 32-bit arithmetic co-processor (with improvement of accuracy for logarithmic conversion)
title_short	An implementation and layout of a 32-bit arithmetic co-processor (with improvement of accuracy for logarithmic conversion)
title_full	An implementation and layout of a 32-bit arithmetic co-processor (with improvement of accuracy for logarithmic conversion)
title_fullStr	An implementation and layout of a 32-bit arithmetic co-processor (with improvement of accuracy for logarithmic conversion)
title_full_unstemmed	An implementation and layout of a 32-bit arithmetic co-processor (with improvement of accuracy for logarithmic conversion)
title_sort	implementation and layout of a 32-bit arithmetic co-processor (with improvement of accuracy for logarithmic conversion)
publishDate	1994
url	http://ndltd.ncl.edu.tw/handle/02453557392387793738
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An implementation and layout of a 32-bit arithmetic co-processor (with improvement of accuracy for logarithmic conversion)

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