A VLSI Architecture and Chip for the Two-Dimensional DCT
碩士 === 國立臺灣科技大學 === 工程技術研究所 === 81 === In this thesis, we present a SIMD-systolic architecture for computing the two-dimensional discrete cosine transform (2D- DCT) and inverse discrete cosine transform (2D-IDCT). With four pro- cessing ele...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
1993
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| Online Access: | http://ndltd.ncl.edu.tw/handle/54693721010543183214 |