Modeling, analysis and performance evaluation of a cache coherence parallel computer architecture

碩士 === 國立臺灣大學 === 電機工程研究所 === 79 ===

Bibliographic Details
Main Authors: HUANG,JIAN-YUAN, 黃建元
Other Authors: ZHANG,SHI-ZHONG
Format: Others
Language:zh-TW
Published: 1991
Online Access:http://ndltd.ncl.edu.tw/handle/47629199236189923333