Interface design and system impact analysis of a message-handling processor for fine-grain multithreading
There appears to be a broad agreement that high-performance computers of the future will be Massively Parallel Architectures (MPAs), where all processors are interconnected by a high-speed network. One of the major problems with MPAs is the latency observed for remote operations. One technique to hi...
| Main Author: | |
|---|---|
| Other Authors: | |
| Language: | en_US |
| Published: |
2012
|
| Subjects: | |
| Online Access: | http://hdl.handle.net/1957/35173 |