Exploiting thread-level parallelism on reconfigurable architectures: a cross-layer approach.
Field Programmable Gate Arrays (FPGAs) are one major class of architectures commonly used in parallel computing systems. FPGAs provide a massive number (i.e., millions) programmable logic blocks and I/O cells, as well as programmable interconnects, which can be configured for a particular applicatio...
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| Online Access: | http://hdl.handle.net/2047/D20254348 |