Circuits and algorithms for pipelined ADCs in scaled CMOS technologies
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2008. === MIT Barker Engineering Library copy: printed in pages. === Also issued printed in pages. === Includes bibliographical references (leaves 179-184). === CMOS technology scaling is cr...
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| Format: | Others |
| Language: | English |
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Massachusetts Institute of Technology
2009
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| Online Access: | http://hdl.handle.net/1721.1/44400 |