The design and construction of a data path chip set for a fault tolerant parallel processor
Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1991. === Includes bibliographical references (p. 165-167). === by Charles E. Sakamaki. === M.S.
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| Format: | Others |
| Language: | English |
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Massachusetts Institute of Technology
2008
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| Online Access: | http://hdl.handle.net/1721.1/39961 |