Instruction-level power consumption simulator for modeling simple timing and power side channels in a 32-bit RISC-V micro-processor

Instruction-level power consumption simulator for modeling simple timing and power side channels in a 32-bit RISC-V micro-processor

Thesis: M. Eng., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, February, 2021 === Cataloged from the official PDF of thesis. === Includes bibliographical references (pages 139-140). === We create a Python based RISC-V simulator that is capable of s...

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Bibliographic Details
Main Author: Fang, Gloria(Gloria Yu Liang)
Other Authors: Anantha Chandrakasan.
Format: Others
Language:English
Published: Massachusetts Institute of Technology 2021
Subjects:
Electrical Engineering and Computer Science.
Online Access:https://hdl.handle.net/1721.1/130686

Internet

https://hdl.handle.net/1721.1/130686

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