A circular pipelined bus architecture for high-speed computation

A circular pipelined bus architecture for high-speed computation

Thesis (B.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1984. === MICROFICHE COPY AVAILABLE IN ARCHIVES AND ENGINEERING. === Bibliography: leaves 60-61. === by Patrick R. Antaki. === B.S.

Bibliographic Details
Main Author: Antaki, Patrick R
Other Authors: Stephen A. Ward.
Format: Others
Language:English
Published: Massachusetts Institute of Technology 2017
Subjects:
Electrical Engineering and Computer Science.
Online Access:http://hdl.handle.net/1721.1/109621

Internet

http://hdl.handle.net/1721.1/109621

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