A partitioning framework for distributed verilog simulation /
The HDL (Hardware Description Language) helps designers of modern digital systems to compete with the increasing size and complexity of VLSI circuits. Simulation is usually used for verification in the design process, which tends to be a bottleneck. Distributed simulation on a network of workstat...
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| Format: | Others |
| Language: | en |
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McGill University
2003
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| Online Access: | http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=80291 |