Parallel network optimization on a shared memory multiprocessor and application in VLSI layout compaction and wire balancing

Parallel network optimization on a shared memory multiprocessor and application in VLSI layout compaction and wire balancing

Discusses the design and implementation of 3 parallel algorithms: one algorithm for the transshipment problem, and 2 algorithms for the dual transshipment problem. Also considers an application of these algorithms in solving VLSI layout compaction and wire balancing problems.

Bibliographic Details
Main Author: Chalasani, Raghu Prasad
Format: Others
Published: 1994
Online Access:http://spectrum.library.concordia.ca/3860/1/NN90832.pdf
Chalasani, Raghu Prasad <http://spectrum.library.concordia.ca/view/creators/Chalasani=3ARaghu_Prasad=3A=3A.html> (1994) Parallel network optimization on a shared memory multiprocessor and application in VLSI layout compaction and wire balancing. PhD thesis, Concordia University.

Internet

http://spectrum.library.concordia.ca/3860/1/NN90832.pdf
Chalasani, Raghu Prasad <http://spectrum.library.concordia.ca/view/creators/Chalasani=3ARaghu_Prasad=3A=3A.html> (1994) Parallel network optimization on a shared memory multiprocessor and application in VLSI layout compaction and wire balancing. PhD thesis, Concordia University.

Similar Items