SAT-based Automated Design Debugging: Improvements and Application to Low-power Design
With the growing complexity of modern VLSI designs, design errors become increasingly common. Design debugging today emerges as a bottleneck in the design flow, consuming up to 30% of the overall design effort. Unfortunately, design debugging is still a predominantly manual process in the industry....
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| Language: | en_ca |
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2012
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| Online Access: | http://hdl.handle.net/1807/33304 |