Coherent Shared Memories for FPGAs
To build a shared-memory programming model for FPGAs, a fast and highly parallel method of accessing the shared-memory is required. This thesis presents a first look at how to implement a coherent caching system in an FPGA. The coherent caching system consists of multiple distributed caches that imp...
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| Language: | en_ca |
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2009
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| Online Access: | http://hdl.handle.net/1807/19001 |
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