Coherent Shared Memories for FPGAs
To build a shared-memory programming model for FPGAs, a fast and highly parallel method of accessing the shared-memory is required. This thesis presents a first look at how to implement a coherent caching system in an FPGA. The coherent caching system consists of multiple distributed caches that imp...
| Main Author: | |
|---|---|
| Other Authors: | |
| Language: | en_ca |
| Published: |
2009
|
| Subjects: | |
| Online Access: | http://hdl.handle.net/1807/19001 |