| Summary: | Due to rapid advances in the speed and complexity of VLSI circuits, analog and mixed-signal
circuits are going through a resurgence. Today, the state-of-the-art of the analog
and mixed-signal integrated circuit testing is to use application-specific test techniques for
individual modules. Efforts have been made to develop simple, generic test techniques
to tackle this problem. Current-mode testing is one such approach. The effectiveness of
power supply current testing for digital IC's has led researchers to explore the possibility of
extending this concept to testing analog blocks of mixed-signal ICs. Unfortunately, current-mode
test techniques developed for commonly-studied analog blocks, such as op-amps and
filters, do not apply to non-linear blocks such as phase-locked loops. This thesis focuses on
investigating the effectiveness of using power supply current monitoring techniques to detect
potential faults in phase-locked loop (PLL) circuits. The decision for declaring a circuit as
fault free, or- faulty, is made by defining a simple threshold which takes into account the
tolerances on the circuit parameters and process variations.
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