Formal verification of a 32-bit pipelined RISC processor
Designing a microprocessor is a significant undertaking. Modern RISC processors are no exception. Although RISC architectures originally were intended to be simpler than CISC processors, modern RISC processors are often very complex, partially due to the prominent use of pipelining. As a result,...
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| Language: | English |
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2009
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| Online Access: | http://hdl.handle.net/2429/5260 |