An integrated low-cost functional tester for CMOS logic
This thesis focuses on improving the quality of tests performed by low-cost testers for Very Large Scale Integration (VLSI) chips. The testing of timing parameters become increasingly important with higher performance technology. Circuits that operate correctly at low speeds may fail at higher sp...
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| Language: | English |
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2009
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| Online Access: | http://hdl.handle.net/2429/4946 |