A power evaluation framework for FPGA applications and CAD experimentation
Field-Programmable Gate Arrays (FPGAs) consume roughly 14 times more dynamic power than Application Specific Integrated Circuits (ASICs) making it challenging to incorporate FPGAs in low-power applications. To bridge the gap, power consumption in FPGAs needs to be addressed at the application, Compu...
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Language: | English |
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University of British Columbia
2013
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Online Access: | http://hdl.handle.net/2429/44589 |