Parallel-Node Low-Density Parity-Check Convolutional Code Encoder and Decoder Architectures

Parallel-Node Low-Density Parity-Check Convolutional Code Encoder and Decoder Architectures

We present novel architectures for parallel-node low-density parity-check convolutional code (PN-LDPC-CC) encoders and decoders. Based on a recently introduced implementation-aware class of LDPC-CCs, these encoders and decoders take advantage of increased node-parallelization to simultaneously decre...

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Bibliographic Details
Main Author: Brandon, Tyler
Other Authors: Elliott, Duncan (Electrical and Computer Engineering)
Format: Others
Language:en_US
Published: 2010
Subjects:
LDPC
Convolutional
Encoder
Decoder
Achitecture
VLSI
throughput
energy-per-bit
parallelization
Online Access:http://hdl.handle.net/10048/981

Internet

http://hdl.handle.net/10048/981

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