RETHROTTLE : Execution Throttling In The REDEFINE SoC Architecture

RETHROTTLE : Execution Throttling In The REDEFINE SoC Architecture

REDEFINE is a reconfigurable SoC architecture that provides a unique platform for high performance and low power computing by exploiting the synergistic interaction between coarse grain dynamic dataflow model of computation (to expose abundant parallelism in the applications) and runtime composition...

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Bibliographic Details
Main Author: Satrawala, Amar Nath
Other Authors: Nandy, S K
Language:en_US
Published: 2011
Subjects:
SoC Architecture
Computer Architecture
Semiconductor-on-Chip Architecture
Dataflow Models
Throttling
Computer Simulation
REDEFINE Architecture
Computer Architecture - Modeling
Hybrid Computer Simulation
Von Neumann Architecture
Coarse Grain
Computer Science
Online Access:http://hdl.handle.net/2005/1017

Internet

http://hdl.handle.net/2005/1017

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