Pré-regulador retificador entrelaçado (Interleaved) ZCS-FM boost, com controle digital através de dispositivo FPGA e linguagem VHDL
Made available in DSpace on 2014-06-11T19:30:52Z (GMT). No. of bitstreams: 0 Previous issue date: 2005-10-27Bitstream added on 2014-06-13T19:40:21Z : No. of bitstreams: 1 goncalves_fas_dr_ilha.pdf: 8475996 bytes, checksum: 3f15a590474f620a763dcc65faf6248f (MD5) === Fundação de Amparo à Pesquisa do...
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Format: | Others |
Language: | Portuguese |
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Universidade Estadual Paulista (UNESP)
2014
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Online Access: | http://hdl.handle.net/11449/100373 |