FPGA acceleration of CNN training
This thesis presents the results of an architectural study on the design of FPGA- based architectures for convolutional neural networks (CNNs). We have analyzed the memory access patterns of a Convolutional Neural Network (one of the biggest networks in the family of deep learning algorithms) by cre...
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| Format: | Others |
| Language: | en_US |
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Georgia Institute of Technology
2016
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| Online Access: | http://hdl.handle.net/1853/54467 |