Design of Efficient FPGA Circuits For Matching Complex Patterns in Network Intrusion Detection Systems

Design of Efficient FPGA Circuits For Matching Complex Patterns in Network Intrusion Detection Systems

The objective of this research is to design and develop a reconfigurable string matching co-processor using field-programmable gate array (FPGA) technology that is capable of matching thousands of complex patterns at gigabit network rates for network intrusion detection systems (NIDS). The motivati...

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Bibliographic Details
Main Author: Clark, Christopher R.
Format: Others
Language:en_US
Published: Georgia Institute of Technology 2005
Subjects:
Network security
Intrusion detection
IDS
Online Access:http://hdl.handle.net/1853/5137

Internet

http://hdl.handle.net/1853/5137

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