An fpga based architecture for native protocol testing of multi-gbps source-synchronous devices
This thesis presents methods for developing FPGA-based test solutions that solve the challenges of evaluating source-synchronous and protocol-laden systems and devices at multi-gigabit per second signaling rates. These interfaces are becoming more prevalent in emerging designs and are difficult to...
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Georgia Institute of Technology
2012
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| Online Access: | http://hdl.handle.net/1853/44858 |