"Analogue Network of Converters": a DfT Technique to Test a Complete Set of ADCs and DACs Embedded in a Complex SiP or SoC
Une nouvelle méthode de test pour les convertisseurs ADC et DAC embarqués dans un système complexe a été développée en prenant en compte les nouvelles contraintes affectant le test. Ces contraintes, dues aux tendances de design de systèmes, sont un nombre réduit de point d'accès aux entrées/sor...
Main Author: | Kerzerho, Vincent |
---|---|
Language: | fra |
Published: |
Université Montpellier II - Sciences et Techniques du Languedoc
2008
|
Subjects: | |
Online Access: | http://tel.archives-ouvertes.fr/tel-00364546 http://tel.archives-ouvertes.fr/docs/00/36/45/46/PDF/2009_02_09_these_VK_version_imprimable_.pdf |
Similar Items
-
Design of 12-bit 6 GS/s high speed DAC with>63 dB SFDR in InP HBT
by: Wang Ming, et al.
Published: (2020-04-01) -
A fully digital technique for the estimation and correction of the DAC error in multi-bit delta sigma ADCs
by: Wang, Xuesheng
Published: (2012) -
A Power-Efficient Pipelined ADC with an Inherent Linear 1-Bit Flip-Around DAC
by: Peiyuan Wan, et al.
Published: (2020-01-01) -
Some Novel Ideas For Static And Dynamic Testing Of High-Speed High Resolution ADCs
by: Sinha, Alok Kumar
Published: (2011) -
Modeling and Implementation of Current-Steering Digital-to-Analog Converters
by: Andersson, Ola
Published: (2005)