An Ultra-Low-Energy, Variation-Tolerant FPGA Architecture Using Component-Specific Mapping

An Ultra-Low-Energy, Variation-Tolerant FPGA Architecture Using Component-Specific Mapping

<p>As feature sizes scale toward atomic limits, parameter variation continues to increase, leading to increased margins in both delay and energy. Parameter variation both slows down devices and causes devices to fail. For applications that require high performance, the possibility of very sl...

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Bibliographic Details
Main Author: Mehta, Nikil
Format: Others
Published: 2013
Online Access:https://thesis.library.caltech.edu/7226/1/Nikil-Mehta-2013.pdf
Mehta, Nikil (2013) An Ultra-Low-Energy, Variation-Tolerant FPGA Architecture Using Component-Specific Mapping. Dissertation (Ph.D.), California Institute of Technology. doi:10.7907/358S-CW22. https://resolver.caltech.edu/CaltechTHESIS:10072012-230900231 <https://resolver.caltech.edu/CaltechTHESIS:10072012-230900231>

Internet

https://thesis.library.caltech.edu/7226/1/Nikil-Mehta-2013.pdf
Mehta, Nikil (2013) An Ultra-Low-Energy, Variation-Tolerant FPGA Architecture Using Component-Specific Mapping. Dissertation (Ph.D.), California Institute of Technology. doi:10.7907/358S-CW22. https://resolver.caltech.edu/CaltechTHESIS:10072012-230900231 <https://resolver.caltech.edu/CaltechTHESIS:10072012-230900231>

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