Packet-switched on-chip FPGA overlay networks

Packet-switched on-chip FPGA overlay networks

As we scale to larger chip capacities, it becomes possible to map large, concurrent applications to programmable fabrics. These applications often have irregular and dynamic communication requirements. Packet-switched networks provide efficient implementations for such applications on these fabrics....

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Bibliographic Details
Main Author: Kapre, Nachiket Ganesh
Format: Others
Published: 2006
Online Access:https://thesis.library.caltech.edu/2334/1/draft.pdf
Kapre, Nachiket Ganesh (2006) Packet-switched on-chip FPGA overlay networks. Master's thesis, California Institute of Technology. doi:10.7907/8NFZ-4Y29. https://resolver.caltech.edu/CaltechETD:etd-05312006-164059 <https://resolver.caltech.edu/CaltechETD:etd-05312006-164059>

Internet

https://thesis.library.caltech.edu/2334/1/draft.pdf
Kapre, Nachiket Ganesh (2006) Packet-switched on-chip FPGA overlay networks. Master's thesis, California Institute of Technology. doi:10.7907/8NFZ-4Y29. https://resolver.caltech.edu/CaltechETD:etd-05312006-164059 <https://resolver.caltech.edu/CaltechETD:etd-05312006-164059>

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