A Greedy Algorithm for Tolerating Defective Crosspoints in NanoPLA Design

A Greedy Algorithm for Tolerating Defective Crosspoints in NanoPLA Design

<p>Recent developments suggest both plausible fabrication techniques and viable architectures for building sublithographic Programmable Logic Arrays using molecular-scale wires and switches. Designs at this scale will see much higher defect rates than in conventional lithography. However, th...

Full description

Bibliographic Details
Main Author: Naeimi, Helia
Format: Others
Published: 2005
Online Access:https://thesis.library.caltech.edu/1624/1/main.pdf
Naeimi, Helia (2005) A Greedy Algorithm for Tolerating Defective Crosspoints in NanoPLA Design. Master's thesis, California Institute of Technology. doi:10.7907/Z5AS-8A57. https://resolver.caltech.edu/CaltechETD:etd-05052005-164226 <https://resolver.caltech.edu/CaltechETD:etd-05052005-164226>

Internet

https://thesis.library.caltech.edu/1624/1/main.pdf
Naeimi, Helia (2005) A Greedy Algorithm for Tolerating Defective Crosspoints in NanoPLA Design. Master's thesis, California Institute of Technology. doi:10.7907/Z5AS-8A57. https://resolver.caltech.edu/CaltechETD:etd-05052005-164226 <https://resolver.caltech.edu/CaltechETD:etd-05052005-164226>

Similar Items