Electrical Properties of Ion Implanted Layers in Silicon and Gallium Arsenide

<p>Part I</p> <p>With the advent of ion implantation, it has become possible to introduce many new dopant species into silicon. The electrical behavior of implanted species displaying deep energy levels was investigated in this work. Hall effect and sheet resistivity measurement...

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Bibliographic Details
Main Author: Pashley, Richard Dana
Format: Others
Language:en
Published: 1974
Online Access:https://thesis.library.caltech.edu/14101/1/Pashley_RD_1974.pdf
Pashley, Richard Dana (1974) Electrical Properties of Ion Implanted Layers in Silicon and Gallium Arsenide. Dissertation (Ph.D.), California Institute of Technology. doi:10.7907/gat7-kp43. https://resolver.caltech.edu/CaltechTHESIS:03102021-184153613 <https://resolver.caltech.edu/CaltechTHESIS:03102021-184153613>
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Summary:<p>Part I</p> <p>With the advent of ion implantation, it has become possible to introduce many new dopant species into silicon. The electrical behavior of implanted species displaying deep energy levels was investigated in this work. Hall effect and sheet resistivity measurements were taken as a function of temperature to determine the carrier concentration, mobility, compensation, and impurity ionization energy in the implanted layers. However, since these electrical parameters varied with depth in the samples, conventional Hall effect methods were inadequate. Special differential Hall techniques were developed to characterize the inhomogeneous samples.</p> <p>The validity of this differential technique was demonstrated by investigating the doping effects of indium in silicon. Differential measurements were first made on samples shallow diffused with indium. Then the results were compared with bulk values that had been obtained in a uniformly doped sample by standard methods. In addition, studies were made on indium implanted silicon to determine the influence of radiation effects. In all three cases an indium acceptor level of 160 meV was observed. Mobility plots versus temperature were also consistent with bulk measurements. However, significant compensation effects were noticed in the implanted layers.</p> <p>With the analysis technique experimentally confirmed, the electrical behavior of tellurium implanted silicon was investigated. Samples were implanted with several doses to study the electrical activity as a function of impurity concentration. Isothermal anneal cycles were performed to determine the anneal temperature necessary to attain peak electrical activity. After anneal, differential Hall measurements were made from 100° to 278°K to characterize the implanted layers. Tellurium was found to behave as a donor with an energy level of 140 meV in ion implanted silicon. For room temperature e1ectron densities above 10<sup>17</sup> carriers/cm<sup>3</sup>, the ionization energy was observed to decrease. In conjunction with this decrease, the doping efficiency of ion implanted tellurium was also observed to decrease for concentrations in excess of 10<sup>17</sup>/cm<sup>3</sup>. Both of these effects were attributed to the influence of energy level broadening.</p> <p>Part II</p> <p>Ion implantation was investigated as a doping process for the fabrication of submicron n-type layers in GaAs. Tellurium implantation was performed as a function of dose (3 x 10<sup>13</sup> - 1 x 10<sup>15</sup> Te/cm<sup>2</sup>) and substrate temperature (23°C - 350°C). After implantation, a protective dielectric coating was sputtered on the samples to prevent the GaAs from disassociating during the anneal. The protective qualities of three dielectrics (SiO<sub>2</sub>, Si<sub>3</sub>N<sub>4</sub>, AlN) were compared. Anneal temperatures ranged from 750°C to 950°C. The residual radiation damage and defects in the implanted layers were studied by photoluminescence and Rutherford backscatteringmeasurements. The electrical characteristics were analyzed by Schottky barrier capacitance-voltage and Hall effect measurements. Sequential Hall measurements in conjunction with layer removal were used to determine the carrier concentration and mobility profiles in the implanted layers. In addition, junction capacitance-voltae and current-voltage measurements were performed to evaluate the quality of implanted diodes.</p> <p>The samples implanted at room temperature and subsequently annealed with a SiO<sub>2</sub> protective coating displayed almost no electrical activity and had intrinsic regions extending several microns into the GaAs. In contrast, high electrical activity was observed in samples implanted at elevated temperatures followed by anneal with a Si<sub>3</sub>N<sub>4</sub> coating. A doping efficiency of 50% was achieved with a carrier density approaching the maximum attainable in tellurium doped GaAs (7 x 10<sup>18</sup> electrons/cm<sup>3</sup>). However, the electrical activity varied over a wide range for samples with identical implant conditions. This scatter in the electrical measurements was attributed to the poor adherence of the Si<sub>3</sub>N<sub>4</sub> layers to the GaAs surface during the anneal.</p> <p>The maximum electrical activity achieved using an AlN encapsulent was comparable to the value attained using a Si<sub>3</sub>N<sub>4</sub> coating. However, the electrical activity was consistently high for the AlN protected samples and the AlN displayed better adherence to the GaAs during anneal than Si<sub>3</sub>N<sub>4</sub>.</p>