Software register synchronization for super-scalar processors with partitioned register files

Software register synchronization for super-scalar processors with partitioned register files

Increases in high-end microprocessor performance are becoming increasingly reliant on simultaneous issuing of instructions to multiple functional units on a single chip. As the number of functional units increases, the chip area, wire lengths, and delays required for a monolithic register file becom...

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Bibliographic Details
Main Author: Maskit, Daniel
Format: Others
Language:en
Published: 1997
Online Access:https://thesis.library.caltech.edu/118/1/Maskit_d_1997.pdf
Maskit, Daniel (1997) Software register synchronization for super-scalar processors with partitioned register files. Dissertation (Ph.D.), California Institute of Technology. doi:10.7907/tyap-ea69. https://resolver.caltech.edu/CaltechETD:etd-01102008-153402 <https://resolver.caltech.edu/CaltechETD:etd-01102008-153402>

Internet

https://thesis.library.caltech.edu/118/1/Maskit_d_1997.pdf
Maskit, Daniel (1997) Software register synchronization for super-scalar processors with partitioned register files. Dissertation (Ph.D.), California Institute of Technology. doi:10.7907/tyap-ea69. https://resolver.caltech.edu/CaltechETD:etd-01102008-153402 <https://resolver.caltech.edu/CaltechETD:etd-01102008-153402>

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