Design and optimization of digital circuits for low power and security applications
Since integration technology is approaching the nanoelectronics range, some practical limits are being reached. Leakage power is increasing more and more with the continuous scaling, and design of clock distribution systems needs to be reconsidered as it becomes difficult to deal with performance an...
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| Format: | Others |
| Language: | en |
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Universite catholique de Louvain
2006
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| Online Access: | http://edoc.bib.ucl.ac.be:81/ETD-db/collection/available/BelnUcetd-06292006-113241/ |