Technique for Efficient Evaluation of SRAM Timing Failure
This brief presents a technique to evaluate the timing variation of static random access memory (SRAM). Specifically, a method called loop flattening, which reduces the evaluation of the timing statistics in the complex highly structured circuit to that of a single chain of component circuits, is ju...
| Main Authors: | , , , , |
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| Other Authors: | |
| Format: | Article |
| Language: | English |
| Published: |
Institute of Electrical and Electronics Engineers (IEEE),
2015-02-06T16:31:23Z.
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| Subjects: | |
| Online Access: | Get fulltext |