Scalability of Sub-100 nm InAs HEMTs on InP Substrate for Future Logic Applications

We have experimentally studied the scaling behavior of sub-100-nm InAs high-electron mobility transistors (HEMTs) on InP substrate from the logic operation point of view. These devices have been designed for scalability and combine a thin InAlAs barrier and a thin channel containing a pure InAs subc...

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Bibliographic Details
Main Authors: Kim, Dae-Hyun (Contributor), del Alamo, Jesus A. (Contributor)
Other Authors: Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science (Contributor)
Format: Article
Language:English
Published: Institute of Electrical and Electronics Engineers (IEEE), 2012-07-17T12:36:41Z.
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