Formal verification of a deadlock detection algorithm
Deadlock detection is a challenging issue in the analysis and design of on-chip networks. We have designed an algorithm to detect deadlocks automatically in on-chip networks with wormhole switching. The algorithm has been specified and proven correct in ACL2. To enable a top-down proof methodology,...
| Main Authors: | , |
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| Format: | Article |
| Language: | English |
| Published: |
Open Publishing Association
2011-10-01
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| Series: | Electronic Proceedings in Theoretical Computer Science |
| Online Access: | http://arxiv.org/pdf/1110.4677v1 |