On device design for steep-slope negative-capacitance field-effect-transistor operating at sub-0.2V supply voltage with ferroelectric HfO2 thin film

• Main Authors: Masaharu Kobayashi, Toshiro Hiramoto
• Format: Article
• Language: English
• Published: AIP Publishing LLC 2016-02-01
• Series: AIP Advances
• Online Access: http://dx.doi.org/10.1063/1.4942427

Internet-of-Things (IoT) technologies require a new energy-efficient transistor which operates at ultralow voltage and ultralow power for sensor node devices employing energy-harvesting techniques as power supply. In this paper, a practical device design guideline for low voltage operation of steep-slope negative-capacitance field-effect-transistors (NCFETs) operating at sub-0.2V supply voltage is investigated regarding operation speed, material requirement and energy efficiency in the case of ferroelectric HfO2 gate insulator, which is the material fully compatible to Complementary Metal-Oxide-Semiconductor (CMOS) process technologies. A physics-based numerical simulator was built to design NCFETs with the use of experimental HfO2 material parameters by modeling the ferroelectric gate insulator and FET channel simultaneously. The simulator revealed that NCFETs with ferroelectric HfO2 gate insulator enable hysteresis-free operation by setting appropriate operation point with a few nm thick gate insulator. It also revealed that, if the finite response time of spontaneous polarization of the ferroelectric gate insulator is 10-100psec, 1-10MHz operation speed can be achieved with negligible hysteresis. Finally, by optimizing material parameters and tuning negative capacitance, 2.5 times higher energy efficiency can be achieved by NCFET than by conventional MOSFETs. Thus, NCFET is expected to be a new CMOS technology platform for ultralow power IoT.