Symbolic Analysis of Faulty Logic Circuits under Correlated Data-Dependent Gate Failures

In this paper we present a method for symbolic analysis of unreliable logic circuits in the presence of correlated and data-dependent gate failures, described by Markov chains. Furthermore, using this method we investigate the influence of data-dependent failures on the performance of majority logi...

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Bibliographic Details
Main Authors: S. S. Brkic, P. N. Ivanis, G. Djordjevic, B. Vasic
Format: Article
Language:English
Published: Telecommunications Society, Academic Mind 2014-06-01
Series:Telfor Journal
Subjects:
Online Access: http://journal.telfor.rs/Published/Vol6No1/Vol6No1_A1.pdf