A Low Power All-Digital PLL With −40dBc In-Band Fractional Spur Suppression for NB-IoT Applications

A Low Power All-Digital PLL With −40dBc In-Band Fractional Spur Suppression for NB-IoT Applications

This paper proposes a low-power fractional-N all-digital PLL (ADPLL) for the narrow-band Internet-of-Things applications. Multi-step lock controlling and oscillator tuning word coarse prediction algorithms help to accelerate the locking process to less than <inline-formula> <tex-math notati...

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Bibliographic Details
Main Authors: Na Yan, Lei Ma, Yongxin Xu, Sizheng Chen, Xusong Liu, Junhui Xiang, Hao Min
Format: Article
Language:English
Published: IEEE 2019-01-01
Series:IEEE Access
Subjects:
All digital phase-locked loop (ADPLL)
digital-to-time converter (DTC)
time-to-digital converter (TDC)
digitally controlled oscillator (DCO)
time amplifier (TA)
narrow-band Internet-of-things (NB-IoT)
Online Access:https://ieeexplore.ieee.org/document/8594601/

Internet

https://ieeexplore.ieee.org/document/8594601/

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