HIGH-LEVEL SYNTHESIS SYSTEM BASED ON HYBRID RECONFIGURABLE MICROARCHITECTURE

HIGH-LEVEL SYNTHESIS SYSTEM BASED ON HYBRID RECONFIGURABLE MICROARCHITECTURE

Subject of Research. The paper presents research of state-of-the-art methods of real-time hardware/software systems development based on FPGAs and SoCs. High-level synthesis system based on the hybrid reconfigurable NISC/TTA microarchitecture is proposed. Method. The work is based on analysis and sy...

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Bibliographic Details
Main Authors: Y. G. Gorbachev, R. I. Yanalov, A. E. Platunov, A. V. Penskoi, A. O. Klyuchev
Format: Article
Language:English
Published: Saint Petersburg National Research University of Information Technologies, Mechanics and Optics (ITMO University) 2019-03-01
Series:Naučno-tehničeskij Vestnik Informacionnyh Tehnologij, Mehaniki i Optiki
Subjects:
embedded systems
CAD
systems on chip
high level synthesis (HLS)
multilevel reconfiguration
FPGA
hardware/software and architecture/compiler CoDesign
NISC
TTA
Online Access:https://ntv.ifmo.ru/file/article/18618.pdf

Internet

https://ntv.ifmo.ru/file/article/18618.pdf

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