Sensitivity Improvement of a Fully Symmetric Vertical Hall Device Fabricated in 0.18 μm Low-Voltage CMOS Technology

Sensitivity Improvement of a Fully Symmetric Vertical Hall Device Fabricated in 0.18 μm Low-Voltage CMOS Technology

This paper proposes a new implementation method to significantly improve the magnetic sensitivity of a fully symmetric vertical Hall device (FSVHD) based on low-voltage CMOS technology. The FSVHD consists of four identical three-contact vertical Hall elements (3CVHE) and each 3CVHE is located in a l...

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Bibliographic Details
Main Authors: Haiyun Huang, Yue Xu
Format: Article
Language:English
Published: IEEE 2021-01-01
Series:IEEE Journal of the Electron Devices Society
Subjects:
Vertical hall device
magnetic sensitivity
trench
standard CMOS 14 technology
Online Access:https://ieeexplore.ieee.org/document/9534868/

Internet

https://ieeexplore.ieee.org/document/9534868/

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