One electron-controlled multiple-valued dynamic random-access-memory

One electron-controlled multiple-valued dynamic random-access-memory

We propose a new architecture for a dynamic random-access-memory (DRAM) capable of storing multiple values by using a single-electron transistor (SET). The gate of a SET is designed to be connected to a plurality of DRAM unit cells that are arrayed at intersections of word lines and bitlines. In thi...

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Main Authors: H. W. Kye, B. N. Song, S. E. Lee, J. S. Kim, S. J. Shin, J. B. Choi, Y.-S. Yu, Y. Takahashi
Format: Article
Language:English
Published: AIP Publishing LLC 2016-02-01
Series:AIP Advances
Online Access:http://dx.doi.org/10.1063/1.4942901
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spelling doaj-e2d47d8a438249f7a165d50eb88567302020-11-24T22:19:46ZengAIP Publishing LLCAIP Advances2158-32262016-02-0162025320025320-510.1063/1.4942901078602ADVOne electron-controlled multiple-valued dynamic random-access-memoryH. W. Kye0B. N. Song1S. E. Lee2J. S. Kim3S. J. Shin4J. B. Choi5Y.-S. Yu6Y. Takahashi7Dept. of Physics & Institute for Nano Science & Technology, Chungbuk National University, Cheongju 361-763, KoreaDept. of Physics & Institute for Nano Science & Technology, Chungbuk National University, Cheongju 361-763, KoreaDept. of Physics & Institute for Nano Science & Technology, Chungbuk National University, Cheongju 361-763, KoreaDept. of Physics & Institute for Nano Science & Technology, Chungbuk National University, Cheongju 361-763, KoreaDept. of Physics & Institute for Nano Science & Technology, Chungbuk National University, Cheongju 361-763, KoreaDept. of Physics & Institute for Nano Science & Technology, Chungbuk National University, Cheongju 361-763, KoreaDept. of Information & Control Engineering, Hankyong National University, Ansung 456-749, KoreaThe Graduate School of Information Science and Technology, Hokkaido University, Sapporo 060-0814, JapanWe propose a new architecture for a dynamic random-access-memory (DRAM) capable of storing multiple values by using a single-electron transistor (SET). The gate of a SET is designed to be connected to a plurality of DRAM unit cells that are arrayed at intersections of word lines and bitlines. In this SET-DRAM hybrid scheme, the multiple switching characteristics of SET enables multiple value data stored in a DRAM unit cell, and this increases the storage functionality of the device. Moreover, since refreshing data requires only a small amount of SET driving current, this enables device operating with low standby power consumption.http://dx.doi.org/10.1063/1.4942901
collection DOAJ
language English
format Article
sources DOAJ
author H. W. Kye
B. N. Song
S. E. Lee
J. S. Kim
S. J. Shin
J. B. Choi
Y.-S. Yu
Y. Takahashi
spellingShingle H. W. Kye
B. N. Song
S. E. Lee
J. S. Kim
S. J. Shin
J. B. Choi
Y.-S. Yu
Y. Takahashi
One electron-controlled multiple-valued dynamic random-access-memory
AIP Advances
author_facet H. W. Kye
B. N. Song
S. E. Lee
J. S. Kim
S. J. Shin
J. B. Choi
Y.-S. Yu
Y. Takahashi
author_sort H. W. Kye
title One electron-controlled multiple-valued dynamic random-access-memory
title_short One electron-controlled multiple-valued dynamic random-access-memory
title_full One electron-controlled multiple-valued dynamic random-access-memory
title_fullStr One electron-controlled multiple-valued dynamic random-access-memory
title_full_unstemmed One electron-controlled multiple-valued dynamic random-access-memory
title_sort one electron-controlled multiple-valued dynamic random-access-memory
publisher AIP Publishing LLC
series AIP Advances
issn 2158-3226
publishDate 2016-02-01
description We propose a new architecture for a dynamic random-access-memory (DRAM) capable of storing multiple values by using a single-electron transistor (SET). The gate of a SET is designed to be connected to a plurality of DRAM unit cells that are arrayed at intersections of word lines and bitlines. In this SET-DRAM hybrid scheme, the multiple switching characteristics of SET enables multiple value data stored in a DRAM unit cell, and this increases the storage functionality of the device. Moreover, since refreshing data requires only a small amount of SET driving current, this enables device operating with low standby power consumption.
url http://dx.doi.org/10.1063/1.4942901
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AT selee oneelectroncontrolledmultiplevalueddynamicrandomaccessmemory
AT jskim oneelectroncontrolledmultiplevalueddynamicrandomaccessmemory
AT sjshin oneelectroncontrolledmultiplevalueddynamicrandomaccessmemory
AT jbchoi oneelectroncontrolledmultiplevalueddynamicrandomaccessmemory
AT ysyu oneelectroncontrolledmultiplevalueddynamicrandomaccessmemory
AT ytakahashi oneelectroncontrolledmultiplevalueddynamicrandomaccessmemory
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