Below 100-fs Timing Jitter Seamless Operations in 10-GSample/s 3-bit Photonic Analog-to-Digital Conversion

We experimentally realize seamless operations with below 100-fs timing jitter in a 10-GSample/s 3-bit photonic analog-to-digital converter (ADC) with an input 2.5-GHz sinusoidal electrical signal. To address the energy efficiency, it is necessary to explore some serial approaches to get most operati...

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Bibliographic Details
Main Authors: M. Hasegawa, T. Satoh, T. Nagashima, M. Mendez, T. Konishi
Format: Article
Language:English
Published: IEEE 2015-01-01
Series:IEEE Photonics Journal
Subjects:
Online Access:https://ieeexplore.ieee.org/document/7098317/