Design and implementation of an ASIP-based cryptography processor for AES, IDEA, and MD5
In this paper, a new 32-bit ASIP-based crypto processor for AES, IDEA, and MD5 is designed. The instruction-set consists of both general purpose and specific instructions for the above cryptographic algorithms. The proposed architecture has nine function units and two data buses. It has also two typ...
| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
| Published: |
Elsevier
2017-08-01
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| Series: | Engineering Science and Technology, an International Journal |
| Subjects: | |
| Online Access: | http://www.sciencedirect.com/science/article/pii/S2215098617300885 |