Power Gating Technique for Power Reduction and Data Retention in CMOS Circuits
Usage of battery powered hand held devices has been increasing in this modern era. To extend the battery life of these devices, more aggressive power reduction techniques are necessary. Power gating techniques are commonly used for suppressing leakage in digital VLSI circuits. In this paper a pow...
| Main Authors: | , |
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| Format: | Article |
| Language: | English |
| Published: |
Editura Universităţii din Oradea
2016-05-01
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| Series: | Journal of Electrical and Electronics Engineering |
| Subjects: | |
| Online Access: | http://electroinf.uoradea.ro/images/articles/CERCETARE/Reviste/JEEE/JEEE_V9_N1_MAY_2016/Manickam_JEEE_Vol_9_Nr_1_MAY_2016.pdf |