Comprehensive Design of Device Parameters for GaN Vertical Trench MOSFETs

• Main Authors: Shuang Liu, Xiufeng Song, Jincheng Zhang, Shenglei Zhao, Jun Luo, Hong Zhang, Yachao Zhang, Weihang Zhang, Hong Zhou, Zhihong Liu, Yue Hao
• Format: Article
• Language: English
• Published: IEEE 2020-01-01
• Series: IEEE Access
• Subjects: GaN vertical trench MOSFETs; breakdown voltage; specific on-resistance; power figure-of-merit (FOM)
• Online Access: https://ieeexplore.ieee.org/document/9019679/

In this work, device parameters for GaN vertical trench MOSFETs have been investigated systematically to further improve the device characteristics. The n^- GaN drift layer, the p⁺ GaN layer and the trench gate are designed and optimized systematically using Silvaco ATLAS 2-D simulation, in order to get the best trade-off between VBR and specific on-resistance R_on. Three-terminal breakdown curves, the electron concentration, current density and electric field strength distributions have been presented to analyze the breakdown characteristics. The correlations between different parameters and different initial conditions are considered, and the eight parameters are optimized comprehensively. After the final optimization, record high FOM of 4.8 GW/cm², V_BR of 2783 V, average electric field E_drift of 1.98 MV/cm and a low R_on of 1.6 mΩ·cm² are obtained for drift layer thickness of 14 μm. The product of the thickness L_p and doping density N_p of p⁺ GaN layer can determine the breakdown mechanism, and punch through mechanism would occur when Lp ·N_p is lower than a certain value. The results indicate there exists large optimization room for fabricated GaN vertical trench MOSFETs, and the device characteristics can be further improved through the methodology in this paper for high power and high voltage applications.