Summary: | A method to engineer the peak-to-valley ratio (PVR) by design of the epitaxial layers is presented. The impact of Al content on PVR of InAs/AlSb/Al(x)Ga(1−x)Sb tunnelling diode is studied. A simplified analytical model is used to explain the PVRs dependence on Al content. It was found that PVR reaches its maximum when Al content x is zero with a quantised InAs layer. The peak positions appeared in the negative differential region are effectively controlled by the applied gate bias. A PVR ratio as high as 7.1 was achieved, which is beneficial for a wide range of circuit applications. Adjusting Al content provides a new way to engineer the PVR as opposed to the conventional way of being optimised by varying barrier thicknesses or doping levels.
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