Topological Horseshoe Analysis and FPGA Implementation of a Classical Fractional Order Chaotic System

Topological Horseshoe Analysis and FPGA Implementation of a Classical Fractional Order Chaotic System

Scholars have done extensive research on dynamic analysis and analog circuits implementation of the classical fractional order chaotic system-Liu System (FOLS). However, they did not rigorously prove the existence of FOLS from the perspective of mathematics. And they also did not effectively design...

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Bibliographic Details
Main Authors: Enzeng Dong, Mingfeng Yuan, Fangfang Han, Jigang Tong, Shengzhi Du
Format: Article
Language:English
Published: IEEE 2019-01-01
Series:IEEE Access
Subjects:
Computer-assisted proof
fractional order liu System
FPGA implementation
topological horseshoe analysis
Online Access:https://ieeexplore.ieee.org/document/8821275/

Internet

https://ieeexplore.ieee.org/document/8821275/

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